ASIC Engineer, Design Verification

Onsite$146,000 - $209,000/yrPosted 2 weeks ago

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Job details

Location: Sunnyvale or Austin
Work type: Onsite
Compensation: $146,000 - $209,000/yr
Posted: 2 weeks ago
Apply on: metacareers.com

About this role

Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications. As a Design Verification Engineer, you will be part of an agile team working with experienced engineers across the industry, focused on developing ASIC solutions for Meta’s data center applications. You will be responsible for the verification closure of a design module or sub-system from test-planning, UVM based test bench development to verification closure. Along with traditional simulation, you will use other approaches like Formal and Emulation to achieve a bug-free design. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success.

Responsibilities

Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification
Develop functional tests based on verification test plan
Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage
Debug, root-cause and resolve functional failures in the design, partnering with the Design team
Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring design quality meets defined verification and coverage goals
Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry

Minimum Qualifications

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
6+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification
6+ years of experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies
Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments

Preferred Qualifications

Experience working across and building relationships with cross-functional design, model and emulation teams
Experience with revision control systems like Mercurial(Hg), Git or SVN
Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle
Experience with Design verification of Data-center applications like Video, AI/ML and Networking designs
Track record of 'first-pass success' in ASIC development cycles
Experience with micro-architectural performance verification
Experience verifying GPU/CPU designs
Experience with verification of ARM/RISC-V based sub-systems or SoCs
Experience in development of UVM based verification environments from scratch
Experience with IP or integration verification of high-speed interfaces like PCIe, RoCE, DDR, HBM, Ethernet
Experience in one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation

Compensation

$146,000/year - $209,000/year; Country: US; Bonus eligible; Equity eligible

About Meta

Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.

California Notice

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Equal Opportunity

Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here.

Accommodations

Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, fill out the Accommodations request form.

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