Cisco
San Jose, California
ASIC Engineering Technical Leader - DFT
Job details
- Location
- San Jose, California
- Work type
- Hybrid
- Compensation
- $183,800 - $263,600/yr
- Posted
- Apr 2, 2026
- Apply on
- cisco.wd5.myworkdayjobs.com
About this role
Bachelor's or Master's in Electrical/Computer Engineering; 7+ years in DFT/silicon engineering; experience with JTAG, Scan, BIST, ATPG, EDA tools, and post-silicon validation; Verilog design experience preferred.
What you'll do at Cisco:
- Implementing DFT features
- Developing DFT IP integration
- Collaborating with RTL/PD teams
Apply to this ASIC Engineering Technical Leader - DFT role at Cisco with a tailored resume on ApplyBolt.