Intel
Santa Clara or Austin or Hillsboro
Director, Silicon Design Engineering
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Apply to Director, Silicon Design Engineering at IntelJob details
- Location
- Santa Clara or Austin or Hillsboro
- Work type
- Hybrid
- Compensation
- $220,920 - $311,890/yr
- Posted
- 1 week ago
- Apply on
- intel.wd1.myworkdayjobs.com
About this role
Requires 6–12+ years timing/physical design experience, BS in EE/CE (or equivalent), proficiency in static timing analysis, timing constraint generation, SoC clocking, TCL scripting, and collaboration with cross-functional teams.
What you'll do at Intel:
- performing timing
- optimizing timing
- collaborating teams
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