SpaceX
Irvine or Redmond
FPGA/ASIC Design Engineer (Silicon Engineering)
Job details
- Location
- Irvine or Redmond
- Work type
- Onsite
- Compensation
- $125,000 - $145,000/yr
- Posted
- 2 weeks ago
- Apply on
- boards.greenhouse.io
About this role
Bachelor’s in EE/CE/CS/Physics; 1+ years RTL design (SystemVerilog/Verilog/VHDL); strong Python/C/C++, and PCB/lab experience.
What you'll do at SpaceX:
- design ASICs
- design FPGAs
- optimize performance
Apply to this FPGA/ASIC Design Engineer (Silicon Engineering) role at SpaceX with a tailored resume on ApplyBolt.