Intel
Hillsboro or Phoenix or Santa Clara or Austin
Principal Engineer, Design Technology Co-optimization
Job details
- Location
- Hillsboro or Phoenix or Santa Clara or Austin
- Work type
- Hybrid
- Compensation
- $220,920 - $311,890/yr
- Posted
- Apr 2, 2026
- Apply on
- intel.wd1.myworkdayjobs.com
About this role
Lead DTCO optimization; 10+ years in IC design; PhD or MS in EE/CS; strong collaboration and leadership skills.
What you'll do at Intel:
- drive optimization
- interface customers
- collaborate teams
Apply to this Principal Engineer, Design Technology Co-optimization role at Intel with a tailored resume on ApplyBolt.