Intel
Austin or Phoenix
Senior CPU RTL Design Engineer – Power Management
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Apply to Senior CPU RTL Design Engineer – Power Management at IntelJob details
- Location
- Austin or Phoenix
- Work type
- Hybrid
- Compensation
- $164,470 - $269,100/yr
- Posted
- Jun 22, 2026
- Apply on
- intel.wd1.myworkdayjobs.com
About this role
Bachelor's (9+ years) or Master's (7+ years) in ECE/CE/CS. Experience in low-power CPU/SoC RTL design, power management (DVFS, power states), RTL development (Verilog/SystemVerilog), debug and system-level design. Preferred: CDC, static timing analysis, UPF, lint.
What you'll do at Intel:
- designing microarchitecture
- developing RTL
- optimizing power
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