Intel
Folsom or Santa Clara
Senior Design Verification Engineer- Mixed Signal IP
Job details
- Location
- Folsom or Santa Clara
- Work type
- Hybrid
- Compensation
- $164,470 - $311,890/yr
- Posted
- Mar 26, 2026
- Apply on
- intel.wd1.myworkdayjobs.com
About this role
BS or MS or PhD in CE/CS/EE with extensive verification experience; SystemVerilog and OVM/UVM required; 4-8+ years depending on degree.
What you'll do at Intel:
- verify design
- develop test benches
- debug issues
Apply to this Senior Design Verification Engineer- Mixed Signal IP role at Intel with a tailored resume on ApplyBolt.