NeuroTechX
South San Francisco, CA
Analog and Mixed-Signal IC Design Engineer Intern
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- Location
- South San Francisco, CA
- Work type
- Onsite
- Visa
- Sponsorship available
- Posted
- 2 weeks ago
- Apply on
- neuralink.com
About this role
Neuralink creates devices that enable a bidirectional interface with the brain to restore movement and sight and transform human-computer interaction. The Analog and Mixed-Signal IC Design Engineer Intern will design analog and mixed-signal chips, including circuit design, layout, verification, simulations, and testing for neural recording and stimulation system-on-chip applications.
What you'll do:
- Define and implement innovative and optimal analog and mixed signal circuit architectures and transistor-level circuit solutions to achieve a variety of challenging noise, mismatch, distortion, power consumption, and cost requirements
- Defines verification plan for a portion of IP or chip and runs complex simulations and analyses (e.g., power, performance, linearity, yield) on designs
- Designs, programs, and runs complex tests and reviews tests of other team members; ensures bugs and other issues are identified and appropriately analyzed
What they're looking for:
- Minimum 1 years of experience in analog/mixed-signal integrated CMOS circuit design for a specific area (e.g., delta-sigma ADC, SAR ADC, DAC, VCO, PLL, DLL, Audio CODEC and Class D audio amplifier, high speed PHY & SERDES) with a successful track record of silicon validation
- Minimum 3 months experience of application of technical skills outside of the classroom (examples: laboratory, research, extracurricular project teams, open source contributions, volunteering, personal projects or prior internship/work experience)
- The ideal candidates are people who get excited about building things, are highly analytical, and enjoy tackling new problems regularly
- Skills in scripting and automation for complex simulation scenarios
- Experience in lab testing of high-precision analog and mixed-signal ICs
- Functional modeling experience and logic verification with Verilog AMS and SystemVerilog
- Experience in design and layout with advanced CMOS FinFET technologies
- Experience with design for high-volume production
Benefits:
- Full-time employees are eligible for an opportunity to change the world and work with some of the smartest and most talented experts from different fields
- Growth potential; we rapidly advance team members who have an outsized impact
- Excellent medical, dental, and vision insurance through a PPO plan for full-time employees
- Paid holidays for full-time employees
- Commuter benefits for full-time employees
- Meals provided for full-time employees
- 401(k) plan; interns are initially excluded until they work 1,000 hours
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