Analog Intern

## Job Description Summer 2027 Internship, May 24 - August 13. Available to be placed in San Jose, San Diego, or Plano. Renesas MID (Memory Interface Division) is looking for an Analog Intern to help the group on the development of the next generation DDR PMIC. During the internship, the intern will focus on researching a PMIC control architecture that could be the solution for the next generation DDR PMIC. They will receive support from DE and AE, perform simulations at different levels, and build circuits in Cadence. This is an opportunity for young talent to build industry skills and develop their career. ## Qualifications - Current PhD or Master’s student with self-driven research capability preferred; must not have graduated before September 2027. - Solid background in power electronics and analog design. - Familiarity with behavioral simulation tools such as SIMPLIS and transistor-level design environments in Cadence.Good performance during the internship may lead to an offer of full-time employment at Renesas.