AMD
San Jose, CA, Santa Clara, CA

ASIC Package Engineer Intern Co-op

OnsitePosted today

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Job details

Location
San Jose, CA, Santa Clara, CA
Work type
Onsite
Posted
today
Apply on
careers.amd.com

About this role

As an ASIC Package Engineer Intern Co-op at AMD, you will support the design, simulation, and thermal-mechanical analysis of advanced semiconductor packaging for high-performance computing and graphics processors. You will collaborate with cross-functional hardware teams to optimize chiplet integration, substrate layout, and signal integrity. This hands-on role is ideal for engineering students looking to gain practical experience in cutting-edge microelectronics packaging technologies.
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About AMD

AMD
San Jose, CA, Santa Clara, CA