Design Verification Intern

Summer Internship — May–August 2027. Duluth, GA — hybrid, 3 days per week. Must be currently enrolled full time in a university degree program pursuing a bachelor’s, master’s, or PhD degree (MSEE preferred) and must not have graduated before September 2027. Renesas is looking for a talented individual for its memory interface products. These products mainly go to datacenters for AI and cloud computing, providing the highest bandwidth for intensive computing while consuming low power. This role is responsible for the development of digital sections of leading-edge memory data buffer chips for DDR5, DDR6, and beyond. ## Responsibilities - Verify DDR5 Data Buffer to meet functional and performance specifications. - Integrate and test at system and block levels using UVM methodology. - Support development of verification plans based on specifications. - Support verification planning, maintenance, feature extraction, verification tests, coverage, and checker development. - Develop efficient, reusable, state-of-the-art verification environments and testbench structures. - Optimize solutions for reusability, performance, and ease of use. - Identify and communicate improvements that may ease verification or improve design behavior. - Support optimization of the UVM-based testbench. - Drive the memory interface products verification effort, including defining verification strategy, developing test plans and coverage, and executing tests. - Drive and quality-control creation of a verification test plan. - Work closely with the design team to ensure the design meets requirements and is testable. - Identify and drive improvements to the verification process to ensure high levels of quality and efficiency. - Drive and monitor design verification coverage. - Provide regular updates to management on verification effort status. ## Qualifications - Currently enrolled full time in a university degree program pursuing a bachelor’s, master’s, or PhD degree; MSEE preferred. - Must not have graduated before September 2027. - Familiarity with at least one coding language: Verilog, SystemVerilog, or UVM concepts. - Strong problem-solving abilities. - Good written and verbal cross-functional communication skills. - Team player and independent thinker with strong design fundamentals.