Micron Technology
Boise, ID
DRAM Design Rules Intern
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Apply to DRAM Design Rules Intern at Micron TechnologyJob details
- Location
- Boise, ID
- Work type
- Onsite
- Posted
- 2 weeks ago
- Apply on
- micron.wd1.myworkdayjobs.com
About this role
Micron Technology is seeking a DRAM Design Rules Intern for their Boise, ID location to help develop and verify physical design layout guidelines for advanced memory chips. In this role, you will collaborate with experienced process integration and circuit design engineers to analyze yield limitations and optimize design-technology co-optimization (DTCO) rules. This full-time internship provides hands-on experience in semiconductor manufacturing and cutting-edge memory development.
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