Micron Technology
Boise, ID
DRAM Test Structure Design and Layout Engineering Intern
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Apply to DRAM Test Structure Design and Layout Engineering Intern at Micron TechnologyJob details
- Location
- Boise, ID
- Work type
- Onsite
- Posted
- 1 week ago
- Apply on
- micron.wd1.myworkdayjobs.com
About this role
As a DRAM Test Structure Design and Layout Engineering Intern at Micron Technology in Boise, you will assist in designing, developing, and laying out specialized test structures for advanced memory chips. This hands-on role involves working closely with senior engineers to validate memory cell performance, troubleshoot layout issues, and optimize test chips for next-generation DRAM technologies.
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