Job details
- Location
- San Jose, California
- Work type
- Onsite
- Compensation
- $136,500 - $253,500/yr
- Posted
- Aug 26, 2026
- Apply on
- cadence.wd1.myworkdayjobs.com
About this role
MS in electrical or computer engineering, 5+ years of CPU or DSP design experience, successful hardware implementations or tape-outs, Verilog/SystemVerilog, EDA tools, Perl, computer architecture, and pipeline design knowledge.
What you'll do at Cadence:
- designing datapaths
- implementing hardware
- optimizing workflows
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