Entry-Level FPGA Design Engineer

Space Dynamics Laboratory (SDL) develops advanced satellite, sensor, instrument, ground-system, and autonomous-system solutions for scientific discovery and national security missions. The Entry-Level FPGA Design Engineer will support the design, fabrication, testing, and support of electronics for space-vehicle telecommunications hardware and sensor payloads, while contributing to payload algorithm development, optimization, integration, and testing.

What you'll do:

• Assist with the design, fabrication, test and support of electronics for telecommunication hardware for space vehicles and sensor payloads in our CVS Division
• Be involved in all aspects of payload algorithm discernment, development, optimization, and testing
• Work as part of larger electronics teams, internal and external to the organization, and own all aspects of their assigned block of the design from concept to integration and test

What they're looking for:

• Must be a U.S. citizen, lawful permanent resident of the U.S., or other U.S. Person
• Bachelor's degree in electrical and/or computer engineering
• Basic digital and analog circuits
• FPGA design
• Embedded software
• Ground support equipment
• Automated test scripting
• Experience with FPGA debugging tools and hardware troubleshooting equipment
• Experience with static timing analysis and timing closure
• Hands-on testing and handling of space electronics in a laboratory environment
• Expertise with digital communications
• Expertise with CCD applications and supporting peripherals

Benefits:

• A comprehensive benefits package