FPGA Design Engineer

Space Dynamics Laboratory (SDL) is in search of a junior FPGA design engineer to assist with the design, fabrication, test and support of electronics for telecommunication hardware for space vehicles and sensor payloads in our CVS Division. The selected candidate will be involved in all aspects of payload algorithm discernment, development, optimization, and testing. The selected candidate must be able to work as part of larger electronics teams, internal and external to the organization, and own all aspects of their assigned block of the design from concept to integration and test. The Civil & Commercial Space (CVS) Division is at the forefront of scientific research and space exploration. We equip major Government and commercial missions with calibrated state-of-the-art sensors and satellites. We also provide world-class AI&T technologies and mission management. Our projects include challenges across planetary science, Earth observation, heliophysics, and astrophysics. Be part of a team that pushes the boundaries of what’s possible in space and contributes to monumental scientific discoveries. This position is full-time and is located in Logan, UT. ## Required Qualifications: - Must be a U.S. citizen, lawful permanent resident of the U.S., or other U.S. Person - Bachelor’s degree in electrical and/or computer engineering - Should be comfortable with: - Basic digital and analog circuits - FPGA design - Embedded software - Ground support equipment - Automated test scripting - Experience with FPGA debugging tools and hardware troubleshooting equipment - Experience with static timing analysis and timing closure - Hands-on testing and handling of space electronics in a laboratory environment ## Desired Qualifications: - Expertise with digital communications - Expertise with CCD applications and supporting peripherals - Experience working on NASA (or other US government) funded projects - Master’s Degree