FPGA Intern – Custom Compute Hardware

Ludwig Computing is focused on solving the energy efficiency problem of intelligent compute through innovative hardware and software platforms. They are seeking a Hardware Engineer intern to assist in FPGA-based prototyping and hardware bring-up, working directly with the founding team on core logics and processing algorithms.

What you'll do:

• Translate architectural concepts into FPGA prototypes
• Design and simulate custom processing modules using Verilog, VHDL, or high-level synthesis (HLS)
• Implement and validate processing components on FPGA platform using industry-standard tools (e.g., Vivado, Quartus, or OpenCL-based flows)
• Benchmark performance and optimize tradeoffs in latency, area, throughput, and memory bandwidth
• Build testbenches, run timing/area analysis, and assist with system integration
• Collaborate with the team to define hardware/software boundaries, and support bring-up of real demos

What they're looking for:

• Experience with FPGA development, RTL or HLS-based design in Verilog/SystemVerilog, VHDL, or C++
• Familiarity with FPGA development tools (Vivado, Quartus, or equivalent)
• Strong grasp of digital logic fundamentals, including pipelining and timing closure
• Experience with memory mapping and hierarchy on FPGA
• Strong skills in simulation, debugging, and synthesis workflows
• Currently pursuing a degree in engineering (preferably Electrical Engineering, Computer Science)
• Experience with OpenCL or HLS-based design targeting FPGA
• Prior Experience with FPGA development boards
• Familiarity with hardware/software co-design and system-level integration
• Course work or project experience in digital design, computer architecture, or embedded systems
• Understanding of memory system tradeoffs
• Exposure to numerical computing, or custom arithmetic units

Benefits:

• Opportunity to work on next generation AI compute architectures
• Hands-on experience building novel, high-speed, energy-efficient compute accelerators on FPGAs
• Opportunity to build skills that bridge into ASIC flows, including RTL quality, test benching, and synthesis-readiness
• Mentorship from a team with expertise in hardware-software co-design, digital architecture, and early-stage prototyping