Santa Clara, California

Graphics (GPU) RTL Design Engineer

Onsite$129,300 - $194,700/yrPosted 2 days agoLikely sponsors

Job details

Location
Santa Clara, California
Work type
Onsite
Compensation
$129,300 - $194,700/yr
Posted
2 days ago
Apply on
jobs.apple.com

About this role

Do you love creating elegant solutions to highly complex challenges? As part of our Silicon Engineering group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processors! You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. As a member of Apple’s GPU Shader Core team, you will develop power efficient, high-performance 3D graphics processor microarchitectures targeted for low power mobile devices and high-performance personal computers that are used by millions of people every day!

Description

As a GPU Design Engineer, you will be responsible for delivering high-quality, low-power graphics IPs that meet our performance, timing, and area goals. You will explore design trade-offs while applying rigorous design principles. Additionally, you will be required to understand and collaborate to groundbreaking microarchitectural specifications to design best in class GPUs. To accomplish this, you will collaborate closely with multi-functional teams in architecture, verification, modeling, and physical design.

Minimum Qualifications

  • BS degree
  • Experience with System Verilog HDL

Preferred Qualifications

  • Experience designing GPU Schedulers, Execution Units, or Caches
  • Experience writing microarchitectural specifications
  • Experience in hardware performance analysis and debug
  • Ability to drive bring up and debug of complex designs
  • Understanding of synthesis tools, timing analysis, floor planning, and the PNR flow
  • Experience with scripting languages such as Python, Ruby, or Perl
  • Ability to work well in a team in order to be productive under aggressive product schedules
  • Experience in GPU, CPU, or SIMD architectures
  • Experience in Logic design, including knowledge of low-power techniques and timing optimizations
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Santa Clara, California