Arista Networks
Santa Clara, California
Hardware Design Integrity Engineer
We tailor your resume to this role and apply for you in seconds.
Apply to Hardware Design Integrity Engineer at Arista NetworksJob details
- Location
- Santa Clara, California
- Work type
- Onsite
- Compensation
- $130,000 - $225,000/yr
- Posted
- 3 weeks ago
- Apply on
- jobs.smartrecruiters.com
About this role
BSEE or MSEE; 5+ years hardware engineering; experience debugging networking hardware, high-speed PCB design (20+ layers), DC/DC multi-phase, DDR/PCIe, signal/power integrity, FPGA with Verilog.
What you'll do at Arista Networks:
- debugging hardware
- writing scripts
- delivering fixes
Apply to this Hardware Design Integrity Engineer role at Arista Networks with a tailored resume on ApplyBolt.
Ready to apply to Arista Networks?
We tailor your resume to this role and apply for you.