Jr. FPGA Developer (Compute Test, North Reading)

Teradyne develops test and automation solutions for advanced electronic and semiconductor technologies. The company is seeking a Junior FPGA Engineer to support FPGA design implementation, hardware bring-up, debugging, timing closure, scripting, and collaboration on high-performance test platforms.

What you'll do:

• Support FPGA design implementation and bring-up under the guidance of senior engineers
• Develop FPGA logic for defined interfaces and subsystems as part of a larger design
• Collaborate with hardware, software, systems, and design verification teams on system-level solutions, simulations, and test coverage goals
• Support timing closure, resource optimization, lab bring-up, debugging, and basic root cause analysis using JTAG and lab instrumentation
• Build and maintain TCL and Python scripts that support design and validation workflows
• Partner in code reviews, design discussions, and PCB and system design decisions that affect FPGA performance, building toward greater technical ownership over time

What they're looking for:

• 2+ years of hands-on experience in FPGA design and development
• Working knowledge of Verilog/SystemVerilog for design and debugging
• Exposure to AMD (Xilinx) and/or Intel FPGA toolchains, including synthesis, implementation, and timing closure
• Understanding of digital design fundamentals and the ability to interpret schematics
• Some exposure to high-speed interfaces such as PCIe, DDR, SerDes, or similar technologies and familiarity with protocols such as AXI4, USB, I2C, and SPI
• Basic experience bringing up or debugging FPGA designs on hardware platforms
• Basic TCL and Python scripting skills and experience with version control systems
• Strong communication and collaboration skills, with an interest in developing system-level thinking and the ability to debug across FPGA, board, and software boundaries
• We are only considering candidates local to the position location and are unable to provide relocation for this position
• This position is not eligible for visa sponsorship
• Coursework or project experience with SystemVerilog-based verification methodologies such as UVM
• Familiarity with FPGA SoCs and embedded processor subsystems

Benefits:

• Medical insurance
• Dental insurance
• Vision insurance
• Flexible Spending Accounts
• Retirement savings plans
• Life insurance
• Disability insurance
• Paid vacation and holidays
• Tuition assistance programs
• Discretionary bonuses based on financial performance