SI/PI Intern

Etched is building hardware for frontier intelligence, focusing on high-performance AI systems. As a Signal Integrity / Power Integrity Intern, you will design and validate systems while collaborating with engineers to enhance signal quality across accelerator platforms.

What you'll do:

• Signal Integrity Analysis
• Perform channel analysis for high-speed interfaces including PCIe, Ethernet, and other SerDes links. Extract and validate S-parameter models from package and PCB layouts. Analyze insertion loss, return loss, impedance discontinuities, and crosstalk. Generate channel compliance reports and support design reviews
• Modeling & Simulation
• Build and validate 3D electromagnetic models using Ansys HFSS. Develop board and package channel models from ECAD design databases. Correlate simulation results with measurements and lab data. Support mixed package-board channel simulations and optimization
• Partner with PCB layout, package, hardware, and ASIC teams to improve signal integrity. Identify root causes of channel degradation and propose design improvements. Contribute to SI design guidelines and best practices
• Extracting S-parameter models from package and board designs for PCIe channels
• Building HFSS models of high-speed breakout regions and BGA transitions
• Performing channel compliance analysis for Ethernet links
• Investigating impedance discontinuities and optimizing via structures
• Developing automated workflows for SI simulation and report generation

What they're looking for:

• Progress toward a BS, MS, or PhD in Electrical Engineering, Computer Engineering, or a related field
• Coursework or project experience in signal integrity, electromagnetics, RF, microwave engineering, or high-speed digital design
• Familiarity with transmission line theory and S-parameters
• Understanding of PCB stackups, routing, and high-speed design fundamentals
• Strong analytical and debugging skills
• Excellent communication and collaboration skills
• Experience with Ansys HFSS, SIwave, ADS, CST, or similar simulation tools
• Experience with PCIe, Ethernet, DDR, or other high-speed interfaces
• Familiarity with Allegro, APD, ODB++, IPC2581, or other ECAD databases
• Experience processing Touchstone files and channel metrics
• Python scripting for simulation automation and data analysis
• Experience with laboratory measurements using VNAs, oscilloscopes, or TDR equipment

Benefits:

• Generous housing support for those relocating
• Daily lunch and dinner in our office
• Direct mentorship from industry leaders and world-class engineers
• Based at our office in San Jose, CA