Astera Labs
San Jose, CA

Signal Integrity Engineer Intern

Onsite$72,800 - $114,400/yrPosted todayVisa Sponsorship

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Job details

Location
San Jose, CA
Work type
Onsite
Compensation
$72,800 - $114,400/yr
Visa
Sponsorship available
Posted
today
Apply on
job-boards.greenhouse.io

About this role

Astera Labs is seeking a Signal Integrity Engineer Intern to join its Signal and Power Integrity team. The intern will analyze high-speed interconnects, support PCB and system-level designs through simulation and laboratory measurement, document results, and collaborate with cross-functional engineering teams.

What you'll do:

  • Support pre-layout, layout, and post-layout signal-integrity analysis for high-speed PCB and system designs
  • Build or update simulation models and analyze critical interconnect behavior, including impedance, insertion loss, return loss, reflections, and crosstalk
  • Assist with S-parameter extraction, simulation, measurement, and interpretation for high-speed channels and differential signals
  • Support lab validation using equipment such as time-domain reflectometers, vector network analyzers, high-speed oscilloscopes, spectrum analyzers, and probing fixtures, with appropriate mentorship
  • Help plan and execute PCB/PCBA validation activities, prioritize critical items, and document results
  • Organize raw measurement data, screenshots, S-parameter files, and analysis results in project documentation
  • Collaborate with electrical, layout, validation, NPI, and other engineering partners to investigate issues and communicate findings
  • Contribute to technical reports, design reviews, and a final project presentation that explains the work, results, and impact

What they're looking for:

  • Enrollment in a bachelor's, master's, or Ph.D. program in electrical engineering, computer engineering, or a related field
  • Academic, research, or project experience with one or more of the following: high-speed digital design, signal integrity, transmission lines, electromagnetics, PCB design, differential signaling, or S-parameters
  • A foundational understanding of frequency-domain or time-domain analysis and how interconnect design affects signal quality
  • Ability to learn simulation and measurement workflows, work carefully with technical data, and communicate conclusions clearly
  • Strong ownership, curiosity, practical judgment, and willingness to collaborate across functions
  • Familiarity with PCB or system-level SI/PI simulation, channel analysis, or lab measurement
  • Exposure to tools or workflows used for high-speed analysis, such as ADS, HFSS, CST, Keysight, Cadence, or equivalent platforms
  • Experience with Python, MATLAB, or another scripting language for data processing and engineering analysis
  • Familiarity with calibration, de-embedding, Touchstone/S-parameter files, eye diagrams, or BER analysis

Benefits:

  • U.S. interns currently receive a $500-per-week housing/relocation stipend for the duration of the internship.
  • Interns participate in Early Career programming, including technical and professional-development sessions, community events, and an end-of-program project presentation.
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About Astera Labs

Astera Labs
San Jose, CA