Cadence
San Jose, California

Sr Principal Design Engineer

Onsite$154,000 - $286,000/yrPosted 2 weeks ago
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Job details

Location
San Jose, California
Work type
Onsite
Compensation
$154,000 - $286,000/yr
Posted
2 weeks ago
Apply on
cadence.wd1.myworkdayjobs.com

About this role

MSEE or equivalent advanced degree and 5+ years designing complex protocols, RTL, or hardware systems. Requires Verilog/SystemVerilog, RTL verification, debugging, analytical, communication, and planning skills.

What you'll do at Cadence:

  • developing memory models
  • verifying RTL designs
  • debugging hardware issues

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About Cadence

Cadence
San Jose, California