Sr. Principal Product Engineer, Silicon Signoff Verification (SSV) / Digital Implementation & Signoff Solutions

OnsitePosted Aug 28, 2026Likely sponsors

Job details

Location
Austin, Texas
Work type
Onsite
Posted
Aug 28, 2026
Apply on
cadence.wd1.myworkdayjobs.com

About this role

Requires 8–12+ years in semiconductor design or product engineering, deep STA/MMMC, ECO, power, signal integrity, physical implementation, customer engagement, and signoff methodology expertise.

What you'll do at Cadence Design Systems:

  • developing methodologies
  • supporting tapeouts
  • mentoring engineers

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About Cadence Design Systems