Palo Alto, California
Sr. RTL Design Engineer
Job details
- Location
- Palo Alto, California
- Work type
- Onsite
- Compensation
- $146,000 - $183,000/yr
- Posted
- Sep 14, 2026
- Apply on
- us-careers-rivian.icims.com
About this role
Bachelor's degree in Electrical/Computer Engineering or equivalent; professional experience designing synthesizable RTL for ASIC/SoC; strong Verilog/SystemVerilog; understanding of digital design; debugging skills; communication and collaboration.
What you'll do at Rivian:
- designing RTL
- debugging RTL
- collaborating with teams
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