SRAM Circuit Design Intern - MS

## About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. ## Your Team, Your Impact Marvell's Central Engineering Foundational IP team is looking for a motivated SRAM Circuit Design Intern to join us in Burlington, VT. You'll work hands-on as part of a team designing, verifying, and characterizing high-performance memory used in cutting-edge semiconductor technologies. ## What You Can Expect - Design and implement custom digital circuits optimizing Power, Performance, and Area metrics (PPA) - Schematic entry (Cadence Virtuoso), Circuit Simulation (Spectre, MDL), Verification (Verilog, VHDL) - Statistical analysis of complex circuits across a wide Process, Voltage and Temperature range - Process and visualize data using scripting tools (Perl, Python, Copilot) - Verilog test pattern generation, simulation and waveform debug for large, complex memory designs - Analyze, summarize, document, and present results to stakeholders to justify design approaches ## What We're Looking For - Currently pursuing a Master’s Degree in Electrical Engineering or a related field with an expected graduation date between Fall 2027 – Summer 2028 ## Preferred Qualifications: - Familiarity working in a Unix/Linux environment - Understanding of analog or digital memory circuits - Strong Programming Skills in common scripting languages - Previous exposure to Cadence design tools - Ability to work independently with regular check-ins and team support - Strong verbal and written communication skills