Static Timing Analysis Design Engineer / Physical Design

Bachelor's or Master's in Electrical/Electronics Engineering or related field; 3-6 years ASIC/SoC timing analysis experience; strong knowledge of industry STA tools (Synopsys flows); scripting in Python, TCL, Perl.

What you'll do at NXP Semiconductors:

• developing timing constraints
• performing static timing analysis
• closing timing on designs

Apply to this Static Timing Analysis Design Engineer / Physical Design role at NXP Semiconductors with a tailored resume on ApplyBolt.