Hardware Intern - Architecture, AI HW & System on a Chip

Tenstorrent is developing high-performance AI computing technology across software, compilers, platforms, networking, and semiconductors. The Hardware Intern will join the Architecture, AI Hardware, or SoC teams to support chip architecture, AI accelerator development, subsystem integration, verification, performance analysis, and silicon delivery.

What you'll do:

• Architecture: We define and evaluate the system, CPU, memory, fabric, and chiplet-level decisions that shape future products. We analyze workloads, performance, power, and system requirements, develop architectural models, do tradeoff analyses, and specifications for implementation
• AI Hardware: We design and develop the core AI accelerator IP, including compute, data movement, and other specialized hardware blocks that enable high-performance AI workloads. We take these IPs from requirements through RTL design, verification, and delivery for SoC integration
• SOC : Our team is where everything comes together. We design and verify the integration of all subsystems and the final pieces that allow the chip to interact with the outside world; scaleout, memory and on-chip system management and security. We validate cross functional and performance requirements, and ultimately take the design to silicon

What they're looking for:

• Currently pursuing a BS, MS, or PhD in EE, ECE, CE, or CS
• Coursework or projects in digital design, computer architecture and performance modeling
• Self-starter who brings sound judgment and practical problem-solving to every project with a solid interest in AI and hardware, along with the ability to take ownership and deliver results
• Familiarity with ASIC design concepts, ranging from performance simulations, RTL design / verification, and logic synthesis / timing analysis
• Scripting & programming skills (example: Python, PERL, tcl, C/C++); with experience using AI coding platforms
• [Architecture] Experience with architectural simulators
• This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency
• Exposure to RISC-V or other open ISAs
• FPGA design experience

Benefits:

• Highly competitive compensation package and benefits
• On-site work arrangement